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MIL-STD-1553B Remote Terminal, BUS Controller, or Passive Monitor Hybrid with Status Word Control Dual Low Power Monolithic BUS Tranceivers
Features
* Dual Low Power Monolithic Bus Tranceivers * Performs the Complete Dual-Redundant Remote Terminal, Bus Controller Protocol and Passive Monitor Functions of MIL-STD-1553B * Automated Self-Test Functions * Allows Setting of the Message Error Bit on Illegal Commands * Provides programmable control over Terminal Flag and Subsystem Flag Status Bits * MIL-PRF-38534 Compliant Circuits Available * 250 mw Typical Power Consumption * Small Size * Available in Ceramic Plug-in Package Configuration CIRCUIT TECHNOLOGY * 5V DC Operation www.aeroflex.com * Full Military (-55C to +125C) Temperature Range * DESC SMD# Pending
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ACT3492 Series
General Description
The ACT3492 Series is a monolithic implementation of the MIL-STD-1553B Bus Controller, Remote Terminal and Passive Monitor functions including dual low power Bus tranceivers. All protocol functions of MIL-STD-1553B are incorporated and a number of options are included to improve flexibility. These features include programming of the status word, illegalizing specific commands and an independent loop back self-test which is initiated by the subsystem. This unit is directly compatible with all microprocessor interfaces such as the CT1611 and CT1800 produced by Aeroflex Incorporated. Block Diagram (With Transformers)
Encoder
Interface Unit
Sub Address & Word Count Outputs
ASIC Decoder "O" Driver Select & Enable Decoder "1"
BUS "0"
T/R Hybrid
Status Word Control
Program Inputs
Discrete Outputs
ASIC
BUS "1"
T/R Hybrid
Internal Highway Control
Control Inputs
Terminal Address Inputs
ASIC ACT3492
eroflex Circuit Technology - Data Bus Modules For The Future (c) SCD3492 REV B 6/26/01
Electrical Performance Characteristics Absolute Maximum Ratings
Parameter
VCC Input or Output Voltage at any Pin Storage Case Temperature Load Temperature (Soldering 10 Sec)
Min
-0.3 -0.3 -65
Max
7.0 VCC + 0.3V +150 +300
Units
V V C C
Digital Protocol Logic Characteristics (Over Full Temperature Range)
Parameter
VCC (Logic) VIH VIL VOH High Level Output Voltage VOL Low Level Output Voltage IIH High Level Input Current Vcc = 5.0V Vcc = 5.0V Vcc = 4.5V Vcc = 4.5V Vcc = 5.5V, VIN = 2.7V Vcc = 5.5V, VIN = 0.4V Vcc = 5.5V -200 -25 -400 -25 2.4 0.4 -700 -400 -900 -400 20
Test Conditions
Min
4.5 2.2
Typ
5.0
Max
5.5
Unit
V V
Notes
0.7
V V V A A A A mA 1A 1A 2A 3A 2A 3A 4A
IL Low Level Input Current
ICC (Logic) Notes:
1A/ 2A/ 3A/ 4A/
IOL = 3mA maximum, IOH = -2 mA maximum for all outputs and bidirectionals. RTAD 0, 1, 2, 3, 4 and RTADPAR only. All inputs and bidirectionals other than those in note 2. Input clock (running) = 6Mhz, All remaining Inputs are Open and All Outputs and Bidirectionals have no load.
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Absolute Maximum Ratings (Analog Tranceiver)
Parameter
VCC Receiver Differential Voltage Receiver Common-Mode Voltage Driver Peak Output Current -5.0
Min
-0.3
Max
7.0 10 Vp-p +5.0 800
Units
V V Vdc mA
Analog Transceiver Recommended Operating Conditions
Parameter
VCC (Logic) Receiver Differential Voltage (See Point A Figure 4) Receiver Common-Mode Voltage (See Figure 4) Driver Peak Output Current Serial Data Rate Case operating temperature -55 -1.75
Min
4.75
Max
5.5 4.0 +5 700 1.0 +125
Unit
V Vp-p Vdc mA MHz C
Notes
Analog Transceiver Characteristics (Over Full Temperature Range)
Parameter
Differential Input Level Input Common-Mode Voltage Threshold Voltage
Min
-8 -1.75 0.6
Max
+8 +5 1.1
Unit
Vp-p V V
Notes
1,3 1,3 4
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Analog Transceiver Characteristics (Over Full Temperature Range)
Parameter
Differential Output Voltage Differential Output Noise Terminal Input Impedance
Symbol
VO
Test Conditions
35 ohm load, Point A 70 ohm load, Point C Figure 4 Inhibited Figure 4, Point A Transmitter off 1 Mhz sine wave As measured from the 1553 bus (direct coupled). Figure 4 Point A 35 ohm load, Point A 70 ohm load, Point C Figure 4
Min
6.0 18
Max
9.0 26 10
Unit
Vp-p Vp-p mVp-p K
Notes
1
VON ZIN
3 1
2.0
Differential Offset Voltage
Vos
90 250 100 100 300 300
mV mV nSec nSec
1, 3, 5 1,5 1 1
Rise Time Fall Time
tR tF
35 or 70 ohm load Figure 4, Points A,C 35 or 70 ohm load Figure 4, Points A,C
Analog Transceiver Power Supply Characteristics (Each Channel)
Parameter
Supply Current
Symbol
ICC1 ICC2 ICC3 ICC4
Test Conditions
Standby 25% duty cycle 50% duty cycle 100% duty cycle
Min
Max
25 160 290 550
Unit
mA mA mA mA
Notes
1,2 1,2 1,2 1,2,3
Notes:
1/ 2/ 3/ VCC = 5.0 Volts dc +/-0.1 Volts dc unless otherwise specified. All specifications and limits are for a single channel with no connections made to the other channel. Parameters shall be tested as part of device initial characterization and after design and process changes. Parameter shall be guaranteed to limits specified in above tables for all lots not specifically tested. Threshold determined by first no response to a receive 32 word command. Measured 2.5Sec after the mid-bit zero crossing of the last parity bit of a 660Sec transmission.
4/ 5/
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REMOTE TERMINAL OPERATION
Receive Data Operation
All valid data words associated with a valid receive data command word for the RT are passed to the subsystem. The RT examines all command words from the bus and will respond to valid (i.e. correct Manchester, parity coding etc.) commands which have the correct RT address (or broadcast address if the RT broadcast option is enabled). When the data words are received, they are decoded and checked by the RT and, if valid, passed to the subsystem on a word by word basis at 20 s intervals. This applies to receive data words in both Bus Controller to RT and RT to RT messages. When the RT detects that the message has finished, it checks that the correct number of words have been received and if the message is fully valid, then a Good Block Received signal is sent to the subsystem, which must be used by the subsystem as permission to use the data just received. The subsystem must therefore have a temporary buffer store up to 32 words long into which these data words can be placed. The Good Block Received signal will allow use of the buffer store data once the message has been validated. If a block of data is not validated, then Good Block Received will not be generated. This may be caused by any sort of message error or by a new valid command for the RT being received on another bus to which the RT must switch.
Transmit Data Operation
If the RT receives a valid transmit data command addressed to the RT, then the RT will request the data words from the subsystem for transmission on a word by word basis. To allow maximum time for the subsystem to collect each data word, the next word is requested by the RT as soon as the transmission of the current word has commenced. It is essential that the subsystem should provide all the data words requested by the RT once a transmit sequence has been accepted. Failure to do so will be classed by the RT as a subsystem failure and reported as such to the Bus Controller.
Control of Data Transfers
This section describes the detailed operation of the data transfer mechanism between the RT and subsystems. It covers the operations of the signals DTRQ, DTAK, IUSTB, H/L, GBR, NBGT, TX/RX during receive data and transmit data transfers. Figures 29 and 30 show typical interfacing logic. Figures 5 and 15 shows the operation of the data handshaking signals during a receive command with one data word. When the RT has fully checked the command word, NBGT is pulsed low, which can be used by the subsystem as an initialization signal. TX/RX will be set low indicating a receive command. When the first data word has been fully validated, DTRQ is set low. The subsystem must then reply within approximately 1.5 s by setting DTAK low. This indicates to the RT that the subsystem is ready to accept data. The data word is then passed to the subsystem on the internal highway IH08-IH715 in two bytes using IUSTB as a strobe signal and H/L as the byte indicator (high byte first followed by low byte). Data is valid about both edges of IUSTB. Signal timing for this handshaking is shown in Figure 15. Also see Figures 19 and 20. If the subsystem does not declare itself busy, then it must respond to DTRQ going low by setting DTAK low within approximately 1.5 us. Failure to do so will be classed by the RT as a subsystem failure and reported as such to the Bus Controller. It should be noted that IUSTB is also used for internal working in the RT. DTRQ being low should be used as an enable for clocking data to the subsystem with IUSTB. Once the receive data block has finished and been checked by the RT, GBR is pulsed low if the block is entirely correct and valid. This is used by the subsystem as permission to make use of the data block. If no GBR signal is generated, then an error has been detected by the RT and the entire data block is invalid and no data words in it may be used. If the RT is receiving data in an RT to RT transfer, the data handshaking signals will operate in an identical
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fashion but there will be a delay of approx 70 s between NBGT going low and DTRQ first going low. Figures 6 and 15 show the operation of the data handshaking signals during transmit command with one data word. As with the receive command discussed previously, NBGT is pulsed low if the command is valid and for the RT. TX/RX will be set high indicating a transmit data command. While the RT is transmitting its status word, it requests the first data word from the subsystem by setting DTRQ low. The subsystem must then reply within approximately 13.5 s by setting DTAK low. By setting DTAK low, the subsystem is indicating that it has the data word ready to pass to the RT. Once DTAK is set low by the subsystem, DTRQ should be used together with H/L and TX/RX to enable first the high byte and then the low byte of the data word onto the internal highway IH08-IH715. The RT will latch the data bytes during IUSTB, and will then return DTRQ high. Data for each byte must remain stable until IUSTB has returned low. Signal timing for this handshaking is shown in Figure 15.
Additional Data Information Signals
At the same time as data transfers take place, a number of information signals are made available to the subsystem. These are INCMD, the subaddress lines SA0-SA4, the word count lines WC0-WC4 and current word count lines CWC0-CWC4. Use of these signals is optional. INCMD will go active low while the RT is servicing a valid command for the RT. The subaddress, transmit/receive bit, and word count from the command word are all made available to the subsystem as SA0-SA4, TX/RX and WC0-WC4 respectively. They may be sampled when INCMD goes low and will remain valid while INCMD is low. See Figure 11. The subaddress is intended to be used by the subsystem as an address pointer for the data block. Subaddress 0 and 31 are mode commands, and there can be no receive or transmit data blocks associated with these. (Any data word associated with a mode command uses different handshaking operations. If the subsystem does not use all the subaddresses available, then some of the subaddress lines may be ignored. The TX/RX signal indicates the direction of data transfer across the RT - subsystem interface. Its use is described in the previous section. The word count tells the subsystem the number of words to expect to receive or transmit in a message, up to 32 words. A word count of all 0s indicates a count of 32 words. The current word count is set to 0 at the beginning of a new message and is incremented following each data word transfer across the RT - subsystem interface. (It is clocked on the falling edge of the second IUSTB pulse in each word transfer). It should be noted that there is no need for the subsystem to compare the word count and current word count to validate the number of words in a message. This is done by the RT.
Subsystem Use of Status Bits and Mode Commands
General Description
Use of the status bits and the mode commands is one of the most confusing aspects of MIL-STD-1553B. This is because much of their use is optional, and also because some involve only the RT while others involve both the RT and the subsystem. The ACT3492 allows full use to be made of all the Status Bits, and also implements all the Mode Commands. External programming of the Terminal Flag and Subsystem Flag Bits plus setting of the Message Error Bit on reception of an illegal command when externally decoded is available. The subsystem is given the opportunity to make use of Status Bits, and is only involved in Mode Commands which have a direct impact on the subsystem. The mode commands in which the subsystem may be involved are Synchronize, Sychronize with data word, Transmit Vector Word, Reset and Dynamic Bus Control Acceptance. The Status Bits to which the subsystem has access, or control are Service Request, Busy, Dynamic Bus Control Acceptance, Terminal Flag, Subsystem Flag, and Message Error Bit. Operation of each of these Mode Commands and of the Status Bits is described in the following sections.
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All other Mode Commands are serviced internally by the RT. The Terminal Flag and Message Error Status Bits and BIT Word contents are controlled by the RT; however the subsystem has the option to set the Message Error Bit and to control the reset conditions for the Terminal Flag and Subsystem Flag Bits in the Status Word, and the Transmitter Timeout, Subsystem Handshake, and Loop Test Fail Bits in the BIT Word.
Synchronize Mode Commands
Once the RT has validated the command word and checked for the correct address, the SYNC line is set low. The signal WC4 will be set low for a Synchronize mode command, and high for a Synchronize with data word mode command (See Figure 9). In a Synchronize with data word mode command, SYNC remains low during the time that the data word is received. Once the data word has been validated, it is passed to the subsystem on the internal highway IH08-IH715 in two bytes using IUSTB as a strobe signal and H/L as the byte indicator (high byte first followed by low byte). SYNC being low should be used on the enable to allow IUSTB to clock synchronize mode data to the subsystem. If the subsystem does not need to implement either of these mode commands, the SYNC signal can be ignored, since the RT requires no response from the subsystem.
Transmit Vector Word Mode Command
Figures 8 and 17 illustrates the relevant signal timings for an RT receiving a valid Transmit Vector Word mode command. The RT requests data by setting VECTEN low. The subsystem should use H/L to enable first the high byte and then the low byte of the Vector word onto the internal highway IH08-IH715. It should be noted that the RT expects the Vector word contents to be already prepared in a latch ready for enabling onto the internal highway when VECTEN goes low. If the subsystem has not been designed to handle the Vector word mode command, it will be the fault of the Bus Controller if the RT receives such a command. Since the subsystem is not required to acknowledge the mode command, the RT will not be affected in any way by Vector word circuitry not being implemented in the subsystem. It will however transmit a data word as the Vector word, but this word will have no meaning.
Reset Mode Command
Figure 7 shows the relevant signal timings for an RT receiving a valid reset mode command. Once the command word has been fully validated and serviced, the RESET signal is pulsed low. This signal may be used as a reset function for subsystem interface circuitry.
Dynamic Bus Allocation
This mode command is intended for use with a terminal which has the capability of configuring itself into a bus controller on command from the bus. The line DBCREQ (See Figure 7) cannot go true unless the DBCACC line was true at the time of the valid command, i.e. tied low. For terminals acting only as RTs, the signal DBCACC should be tied high (inactive), and the signal DBCREQ should be ignored and left unconnected.
Use of the Busy Status Bit
The Busy Bit is used by the subsystem to indicate that it is not ready to handle data transfers either to or from the RT. The RT sets the bit to logic one if the BUSY line from the subsystem is active low at the time of the second falling edge of INCLK after INCMD goes low. This is shown in Figures 14 and 20. Once the Busy bit is set, the RT will stop all receive and transmit data word transfers to and from the subsystem. The data transfers in the Synchronize with data word and Transmit Vector word mode commands are not affected by the Busy bit and will take place even if it has been set. It should be noted that a minimum of 0.5 s subaddress decoding time is given to the subsystem before setting of status bits. This allows the subsystem to selectively set the Busy bit if for instance one
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subaddress is busy but others are ready. This option will prove useful when an RT is interfacing with multiple subsystems.
Use of the Service Request Status Bit
The Service Request bit is used by the subsystem to indicate to the Bus Controller that an asynchronous service is requested. The timing of the setting of this bit is the same as the Busy bit and is shown in Figures 14 and 20. Use of SERVREQ has no effect on the RT apart from setting the Service Request bit. It should be noted that certain mode commands require that the last status word be transmitted by the RT instead of the current one, and therefore a currently set status bit will not be seen by the Bus Controller. Therefore the user is advised to hold SERVREQ low until the requested service takes place.
Use of the Subsystem Status Bit
This status bit is used by the RT to indicate a subsystem fault condition. If the subsystem sets SSERR low at any time, the subsystem fault condition in the RT will be set, and the Subsystem Flag status bit will subsequently be set. The fault condition will also be set if a handshaking failure takes place during a data transfer to or from the subsystem. The fault condition is cleared on power-up or by a Reset mode command.
Dynamic Bus Control Acceptance Status Bit
DBCACC, when set true, enables an RT to configure itself into a Bus Controller, if the subsystem has the capability, by allowing DBCREQ to pulse true and BIT TIME 18 to be set in the status response. If Dynamic Bus Control is not required then DBCACC must be tied high. DBCACC tied high inhibits DBCREQ and clears BIT TIME 18 in the status response.
OPTIONAL STATUS WORD CONTROL
Message Error Bit
The ACT3492 monitors all receptions for errors and sets the Message Error Bit as prescribed in MIL-STD-1553B. The subsystem designer may, however, exercise the option of monitoring for illegal commands and forcing the Message Error Bit to be set. The word count and subaddress lines for the current command are valid when INCMD goes low. The subsystem must then determine whether or not the word count or subaddress is to be considered illegal by the RT. If either of them is considered illegal, the subsystem must produce a positive-going pulse called MEREQ. The positive-going edge of MEREQ must occur within 500 nSec of the falling edge of INCMD .
Subsystem Flag and Terminal Flag Bits
The conditions that cause the Subsystem Flag and Terminal Flag Bits in the Status Word to be reset may be controlled by the subsystem using the ENABLE, BIT DECODE, NEXT STATUS, and STATUS UPDATE inputs. If ENABLE is inactive (high), then the Terminal Flag and Subsystem Flag behavior is the same as described below: (i.e. the other three option lines are disabled). Subsystem Flag Bit This bit is reset to logic zero by a power up initialization or the servicing of a legal mode command to reset the remote terminal (code 01000). This bit shall be set in the current status register if the subsystem error line, SSERR, from the subsystem ever goes active low. This bit shall also be set if an RT/subsystem handshaking failure occurs. This bit, once set, shall be repeatedly set until the detected error condition is known to be no longer present.
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Terminal Flag Bit This bit is reset to logic zero by a power up initialization or the servicing of a legal mode command to reset the remote terminal (code 01000). This bit can be set to logic one in the current status register in four possible ways: a) If the RX detects any message encoding or content error in the terminals transmission. A loop test failure, LTFAIL, will be signalled which shall cause the Terminal Flag to be set and the transmission aborted. b) If a transmitter timeout occurs while the terminal is transmitting. c) If a remote terminal self test fails. d) If there is a parity error in the hard wired address to the RX chip. This bit, once set, shall be repeatedly set until the detected error condition is known to be no longer present. The transmission of this bit as a logic one can be inhibited by a legal mode command to inhibit terminal flag bit (code 00110). Similarly, this inhibit can be removed by a mode command to override inhibit terminal flag bit (code 00111), a power up initialization or a legal mode command to reset remote terminal (code 01000). If ENABLE is held low, then the three options described below are available and are essentially independent. Any, all, or none may be selected. Also, reporting of faults by the subsystem requires that SSERR be latched (not pulsed) low until the fault is cleared.
Resetting SSF and TF on Receipt of Valid Commands
If ENABLE is selected and the other three option lines are held high, then the Status Word Register will be reset on receipt of any valid command with the exception of Transmit Status and Transmit Last Command. Note that in this mode, the TF will never be seen in the Status Word, and the SSF will only be seen if SSERR is latched low. Also note that the SSF will not be seen in response to Transmit Status or Transmit Last Command if the preceding Status Word was clear, regardless of actions taken on the SSERR line after the clear status transmission.
Status Register Update at Fault Occurrence
If STATUS UPDATE is selected (held low), then the TF or SSF will appear in response to a Transmit Status or Transmit Last Command issued as the first command after the fault occurs. Any other command (except as noted in the Preserving the BIT Word section) will reset the TF and SSF. Repeated Transmit Status or Transmit Last Command immediately following the fault will continue to show the TF and/or SSF in the Status Word. Note that this behavior may not meet the "letter-of-the-spec" as described in MIL-STD-1553B, but is considered the "preferred" behavior by some users.
TF and SSF Reporting in the Next Status Word After the Fault
If NEXT STATUS is selected (held low), then the TF or SSF will appear in response to the very next valid command after the fault except for Transmit Status or Transmit Last Command. The flag(s) will be reset on receipt of any valid command following the status transmission with the flag(s) set except for Transmit Status, Transmit Last Command, or as noted in the following section on Preserving the BIT Word.
Preserving the BIT Word
In order to preserve the Transmitter Timeout Flag, Subsystem Handshake Failure, and Loop Test Failure Bits in the BIT Word, it is necessary to select BIT DECODE (hold it low). This will prevent resetting those bits if the Transmit Bit Word Mode Command immediately follows the fault or follows a Transmit Last Command or Transmit Status immediately following the fault. It will also prevent resetting the TF and SSF Bits in the Status Word. Any other valid commands will cause those BIT Word Bits and the Status Word Bits to be reset.
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BUS CONTROL OPERATION
To enable its use in a bus controller the ASIC has additional logic within it. This logic can be enabled by pulling the pin labelled RT/BC low. Once the ASIC is in bus control mode, all data transfers must be initiated by the bus control processor correctly commanding the ASIC via the subsystem interface. In bus control mode six inputs are activated which in RT mode are inoperative and four signals with dual functions exercise the second function (the first being for the RT operation). To use the ACT3492 as a 1553B bus control interface, the bus control processor must be able to carry out four basic bus-related functions. Two inputs, BCOPA and BCOPB allow these four options to be selected. The option is then initiated by sending a negative-going strobe on the BCOPSTB input. BCOPSTB must only be strobed low when NDRQ is high. This is particularly important when two options are required during a single transfer.See Figure 28 and Table 1. With these options all message types and lengths can be handled. Normal BC/RT exchanges are carried out in option zero. This is selected by setting BCOPA and BCOPB to a zero and strobing BCOPSTB. On receipt of the strobe, the ACT3492 loads the command word from an external latch using CWEN and H/L. The command word is transmitted down the bus. The TX/RX bit is, however, considered as being its inverse and so if a transmit command is sent to a RT (Figure 21), the ACT3492 in BC mode believes it has been given a receive command. As the RT returns the requested number of data words plus its status, the BC carries out a full validation check and passes the data into the subsystem using DTRQ, DTAK, H/L, IUSTB and CWC as in RT operation. It also supplies GBR at the end of a valid transmission. Conversely, a receive command sent down the bus is interpreted by the BC as a transmit command, and so the requisite data words are added to the command word. See Figure 22. For mode commands, where a single command word is required, option one is selected by strobing BCOPSTB when BCOPA is high and BCOPB is low. On receiving the strobe, the command word is loaded from the external latch using CWEN and H/L, the correct sync and parity bits are added and the word transmitted (See Figure 23). Mode commands followed by a data word requires option two. Option two, selected by strobing BCOPSTB while BCOPA is low and BCOPB is high, loads a data word via DWEN and H/L, adds sync and parity and transmits them to the bus (See Figure 25). If the mode code transmitted required the RT to return a data word, then selecting option three by strobing BCOPSTB when BCOPA and BCOPB are both high will identify that data word and if validated, output it to the subsystem interface using RMDSTB and H/L. This allows data words resulting from mode codes to be identified differently from ordinary data words and routed accordingly (See Figure 24). All received status words are output to the subsystem interface using STATSTB and H/L. In BC option three, if the signal PASMON is active, then all data appearing on the selected bus is output to the subsystem using STATSTB for command and status words or RMDSTB for data words. See Passive Monitor. RT to RT transfers require the transmission of two command words. A receive command to one RT is contiguously followed by a transmit command to the other RT. This can be achieved by selecting option one followed by option zero for the second command. The strobe (BCOPSTB) for option zero must be delayed until NDRQ has gone low and returned high following the strobe for option one. The RT transmissions are checked and transferred in the subsystem interface to the bus control processor (See Figure 26). BC must wait for RTO to pulse before issuing subsequent messages.
PASSIVE MONITOR
The Monitor Mode may be utilized to analyze or collect all activities which occur on a selected bus. This is initiated by selecting a bus, placing the unit in BC option three and setting PASMON low. All data appearing on the selected bus is output to the subsystem using STATSTB for Command and Status Words or RMDSTB for Data Words. See Figure 27.
AUTOMATED SELF-TEST
The ACT3492 has been designed to fully support a wrap-around self-test which ensures a high degree of
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fault coverage. The monolithic circuit includes all circuitry required to perform the self-test. Self-test can be an on-line or off-line function which is initiated by simple subsystem intervention. The DRVINH signal selects on-line or off-line testing. The circuit accomplishes the on-line test without accessing the MIL-STD-1553 data bus by providing an internal data path which connects the encoder circuitry directly to the decoder circuitry. The transceiver is inhibited during this on-line test. The off-line test is designed to include the transceiver as well as the protocol device. This mode will generally be useful as an off-line card test where no live bus is in use. To initiate the self-test a word is placed in the Vector Word Latch, Loop Test Enable (LTEN) is held low, and the Loop Test Trigger (LTTRIG) signal is pulsed low. The primary bus will be tested with the word that resides in the Vector Word Latch, encoded then looped back, decoded and presented to the subsystem as a normal data transfer would be accomplished. The secondary bus is sequentially tested after the primary bus is completed via Request Bus A (REQBUSA) utilizing the same word residing in the Vector Word Latch. Upon completion of each test, pass/fail signals will be asserted reporting the results of the test. This test implementation verifies MIL-STD-1553 protocol compliance; proper sync character, 16 data bits, Manchester II coding, odd parity, contiguous word checking and a bit by bit comparison of the transmitted data. The self-test circuitry increases the fault coverage by insuring that the internal function blocks; encoder, decoder, and internal control circuitry are operating correctly. An effective data pattern to accomplish this is HEX AA55 since each bit is toggled, (8 bit internal highway) on a high/low byte basis. The total time required to complete the self-test cycle is 89 microseconds. The Loop Test Enable signal must remain in the low state throughout the diagnostic cycle.
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Pin Description
Signal
RTAD 0-4
Direction
INPUT
Pin
K6,K5 J5,H5 F4 J6 J4
Signal Description
RT address lines - These should be hardwired by the user. RTAD4 is the most significant bit. RT address parity line - This must be hardwired by the user to give odd parity. Bitword Decode - When held low, prevents resetting TXTO Bit, HSFAIL Bit, and LTFAIL Bit in the BIT Word (as well as TF and SSF Bits in the Status Word) upon receipt of a Transmit Bit Word Mode Command. Broadcast command enable Bus 1 - When low the recognition of broadcast command is prevented on Bus 1. Broadcast command enable Bus 0 - When low the recognition of broadcast command is prevented on Bus 0. 6 Megahertz master clock. Internal Highway - Bi-directional 8 bit highway on which 16 bit words are passed in two bytes. IH 715 is the most significant bit of each byte, the most significant byte being transferred first. The highway should only be driven by the subsystem when data is to be transferred to the RT.
RTADPAR BIT DECODE
INPUT INPUT
BCSTEN 1 BCSTEN 0 6MCK (Clock) IH 08 (LSB) IH 19 IH 210 IH 311 IH 412 IH 513 IH614 IH715 (MSB) DTRQ
INPUT INPUT INPUT BIDIR
F5 G5 E4 E9 D6 D7 A9 D8 B9 D9 C9
OUTPUT
K10
Data Transfer Request - Goes low to request a data transfer between the ASIC and subsystem. Goes high at the end of the transfer. Data Transfer Acknowledge - Goes low to indicate that the subsystem is ready for the data transfer. Interface Unit Strobe - This is a double pulse strobe used to transfer the two bytes of data High/Low - Indicates which byte of data is on the internal highway. Logic level "0" for least significant byte. Good Block Received - Pulses low for 500ns when a block of data has been received by the ASIC and has passed all the validity and error checks. New Bus Grant - Pulses low whenever a new command is accepted by the ASIC. Message Error Request - Positive-going edge will cause Message Error Bit in Status Word to be set.
DTAK IUSTB H/L GBR
INPUT OUTPUT OUTPUT OUTPUT
F6 G6 J9 J7
NBGT MEREQ
OUTPUT INPUT
G9 E8
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Pin Description (Cont.)
Signal
TX/RX
Direction
OUTPUT
Pin
H10
Signal Description
Transmit/Receive - The state of this line informs the subsystem whether it is to transmit or receive data. The signal is valid while INCMD is low. In Command - Goes low when the RT is servicing a valid command. The subaddress and word count lines are valid while the signal is low. Word Count - These five lines specify the requested number of data words to be received or transmitted. Valid when INCMD is low. Sub Address - These five lines are a label for the data being transferred. Valid when INCMD is low. Current Word Count - These five lines define which data word in the message is currently being transferred. Synchronize - Goes low when a synchronize mode code is being serviced. Vector Word Enable/DataWord Enable - In the RT mode, this signal is provided to enable the contents of the vector word latch (which is situated in the subsystem) onto the ASIC's internal highway. This signal, when in the Bus Controller mode, is used to enable mode code data from the subsystem onto the internal highway. Reset - This line pulses low for 500ns on completion of the servicing of a valid and legal mode command to reset remote terminal. Subsystem Error - By taking this line low, the subsystem can set the Subsystem Flag in the Status Word. Busy - This signal should be driven low if the subsystem is not ready to perform a data transfer to or from the ASIC. Service Request - This signal should be driven low to request an asynchronous transfer and left low until the transfer has taken place. Internal Clock (2 MHz) - This is made available for synchronization use by the subsystem if required. However, many of the outputs to the subsystem are asynchronous. End of Transmission - Goes low if a valid sync plus two data bits do not appear in time to be contiguous with preceding word. Remote Terminal Address Error - This line goes low if an error is detected in the RT address parity of the selected receiver. Any receiver detecting an error in the RT address will turn itself off.
13 SCD3492 REV B 6/26/01 Plainview NY (516) 694-6700
INCMD
OUTPUT
K9
WC0-WC4
OUTPUT
B7,C8 A6,B6 A4 J10,K8 H7,K3 H2 H4,H8 K4,J8 K1 G7 G8
SA0-SA4
OUTPUT
CWC0-CWC4
OUTPUT
SYNC VECTEN/DWEN
OUTPUT OUTPUT
RESET
OUTPUT
C4
SSERR BUSY SERVREQ
INPUT INPUT INPUT
A5 C7 A3
INCLK
OUTPUT
G10
EOT RTADER
OUTPUT OUTPUT
H9 A1
Aeroflex Circuit Technology
Pin Description (Cont.)
Signal
HSFAIL
Direction
OUTPUT
Pin
B5
Signal Description
Handshake Failure - This line pulses low if the allowable time for DTAK response has been exceeded during the ASIC/subsystem data transfer handshaking. Last Command/Command Word Enable - This line pulses low when servicing a valid and legal mode command to transmit last command. When in RT mode this line must not be used to enable data from the subsystem. This line also pulses low, when in the Bus Control mode, when a command word is required for transmission. Status Enable/Status Strobe - This line pulses low to enable the status word onto the internal highway for transmission. When in RT mode this line must not be used to enable data from the subsystem. This line also pulses high, when in the Bus Control mode, to strobe received status words into the subsystem. When PASMON is true this line pulses high for Command and Status words. Status Update - When held low, causes TF or SSF to appear in Status Word response to Transmit Status or Transmit Last Command issued immediately after fault occurrence Built In Test Enable/Receive Mode Data Strobe - This line pulses low when servicing a valid and legal mode command to transmit the internal BIT word. This signal is for information only and must not be used to enable data from the subsystem. This line also pulses high when in the Bus Control mode when mode data is received to be passed to the subsystem and when data is passed to the subsystem during PASMON. Data Word Sync - This line goes low if a data word sync and two Manchester biphase bits are valid. Enable - When held low, enables Bit Decode, Next Status, and Status Update program lines. Command Word Sync - This line goes low if a command word sync and two Manchester biphase bits are valid. No Data Required - This line goes low if the encoder transmit buffer is full i.e. another word is going to be transmitted. This signal is for information only and must not be used to enable data from the subsystem. Next Status - When held low, causes TF or SSF to appear in very next Status Word after fault occurrence (except for Transmit Status or Transmit Last Command). Master Reset - A logic low on this input (100 nSec minimum) will reset the interface.
LSTCMD/CWEN
OUTPUT
D5
STATEN/ STATSTB
OUTPUT
K7
STAT UPDATE
INPUT
E6
BITEN/ RMDSTB
OUTPUT
C6
DWSYNC ENABLE CMSYNC NDRQ
OUTPUT INPUT OUTPUT OUTPUT
G3 E7 G4 D10
NEXT STAT
INPUT
A10
MASTER RESET
INPUT
B8
Aeroflex Circuit Technology
14
SCD3492 REV B 6/26/01 Plainview NY (516) 694-6700
Pin Description (Cont.)
Signal
PASMON
Direction
INPUT
Pin
F8
Signal Description
Passive Monitor - When functioning as a Bus Controller this line acts as a passive monitor select. The active going edge of this line will cause the REQBUS lines to be latched and that bus, now selected will be monitored so long as PASMON remains low. All traffic on the bus will be handed, after validation, to the subsystem via STATSTB for status and commands words, and RMDSTB for data words. Bus Controller Operation Strobe - When functioning as a Bus Controller a low going pulse on this line will initiate the selected bus controller operation on the requested bus, using BCOPA&B and REQBUSA&B. Bus Control Operation A - Least significant bit of the bus controller operation select lines. Bus Control Operation B - Most significant bit of the bus controller operation select lines. Request Bus A - This line, when in RT mode, is the least significant bit of the bus request lines which specify the origin of the command, i.e. they are sources. When in BC mode these lines are sinks and specify which bus is to be used for the next command. Request Bus B - Most significant bit of the bus request lines. (See above for description.) Remote Terminal/Bus Control - This line when high causes the ASIC to function as a remote terminal. When low the ASIC functions as a bus controller or passive monitor. Dynamic Bus Control Accept - This line should be permanently tied low if a subsystem is able to accept control of the bus if offered. Loop Test Fail - This line goes low if any error in the transmitted waveform is detected or if any parity error in the hardwired RT address is detected. Error - This line latches low if a Manchester or parity error is detected. It is reset by the next CMSYNC (RT mode) and also by RTO in the BC mode. Reply Time Out - This signal will pulse low whenever the reply time for a transmitting terminal has been exceeded. This line is intended for the bus controller use. Transmitter Time Out - This line latches low if the transmitter time out limits are exceeded. Parity Error - This line will pulse low if a parity error is detected by the decoder.
BCOPSTB
INPUT
F7
BCOPA BCOPB REQBUS A
INPUT INPUT BIDIR
B10 C10 E5
REQBUS B RT/BC
BIDIR INPUT
H6 B4
DBCACC
INPUT
B3
LTFAIL
OUTPUT
E2
ERROR
OUTPUT
F2
RTO
OUTPUT
F3
TXTO PARER
OUTPUT OUTPUT
C3 D3
Aeroflex Circuit Technology
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SCD3492 REV B 6/26/01 Plainview NY (516) 694-6700
Pin Description (Cont.)
Signal
MANER DBCREQ
Direction
OUTPUT OUTPUT
Pin
E3 C5
Signal Description
Manchester Error - This line will pulse low if a Manchester error is detected by the decoder. Dynamic Bus Control Request - This line will pulse low when the status reply for a mode code Dynamic Bus Control has finished where the accept bit was set. Valid Data - This line will pulse low when a valid data word is received. Driver Inhibit - Selects on-line or off-line testing during automated self test. When high self test is on-line. Must be high when LTEN is high. Loop Test Enable - Enables automated self-test when low. Normally high. Loop Test Trigger - When pulsed low while LTEN is low automated self-test is initiated. LTEN pulse width should be 100ns < PW < 5s. Bus A Transmit/Receive - HIGH output to the primary side of the coupling transformer that connects to the A Channel of the 1553 Bus. Bus A Transmit/Receive - LOW output to the primary side of the coupling transformer that connects to the A Channel of the 1553 Bus. Bus B Transmit/Receive - HIGH output to the primary side of the coupling transformer that connects to the B Channel of the 1553 Bus. Bus B Transmit/Receive - LOW output to the primary side of the coupling transformer that connects to the B Channel of the 1553 Bus. +5V Input Power Supply connection for the A Channel Tranceiver +5V Input Power Supply connection for the B Channel Tranceiver +5V Input Power Supply connection for the Digital Protocol section. Power Supply return for the A Channel Tranceiver. Power Supply return for the B Channel Tranceiver. Power Supply return for the Digital Protocol section. Connected to DIGGND1 and DIGGND2
VALD DRVINH
OUTPUT INPUT
C2 H3
LTEN LTTRIG
INPUT INPUT
A7 A8
TX/RX A1 TX/RX A2 TX/RX A1 TX/RX A2 TX/RX B1 TX/RX B2 TX/RX B1 TX/RX B2 +5VAA +5VAB +5VBA +5VBB +5VLogic GND A GND B DIGGND 1 DIGGND 2 CASE
BIDIR
B2 B1
BIDIR
D2 D1
BIDIR
G1 G2
BIDIR
J1 J2
POWER
E1 A2 K2 F1 E10 C1 H1 F9 F10
POWER
POWER POWER POWER POWER
Aeroflex Circuit Technology
16
SCD3492 REV B 6/26/01 Plainview NY (516) 694-6700
NEXT
Controller to Receive RT Transfer Command RT to Controller Transfer RT to RT Transfer Mode Command Without Data Word Mode Command With Data Word (Transmit) Mode Command With Data Word (Receive)
Data Word
Data Word
....
Data Word Status Word
Data Word
.. ....
Data Word
Status Word
Command Word
NEXT
Transmit Command
..
Status Word
Data Word Data Word
NEXT
Data Word
Command Word
NEXT
Receive Transmit Command Command
..
Status Word
....
Data Word
..
Status Word
Command Word
Mode Command
.. ..
Command Word
NEXT
Mode Command
Status Word
Data Word
Command Word
NEXT
Mode Command
Data Word
..
Status Word
Command Word
NOTE:
. . = Response Time
= Intermessage Gap
Figure 1 - Typical Message Formats
T/R Bit
1 1 1 1 1 1 1 1 1 1
Mode Code
00000 00001 00010 00011 00100 00101 00110 00111 01000 01001
Function
Dynamic Bus Control Synchronize Transmit Status Word Initiate Self Test Transmitter Shutdown Override Transmitter Shutdown Inhibit Terminal Flag Bit Override lnhibit Terminal Flag Bit Reset Remote Terminal Reserved Reserved Transmit Vector Word Synchronize Transmit Last Command Transmit BlTWord Selected Transmitter Shutdown Override Selected Transmitter Shutdown Reserved Reserved
Associated Data Word
No No No No No No No No No No No Yes Yes Yes Yes Yes Yes Yes Yes
Broadcast Command Allowed
No Yes No Yes Yes Yes Yes Yes Yes TBD TBD No Yes No No Yes Yes TBD TBD
1 1 0 1 1 0 0 1 or 0
01111 10000 10001 10010 10011 10100 10101 10110
1 or 0
11111
Figure 2 - Assigned Mode Codes
Aeroflex Circuit Technology 17 SCD3492 REV B 6/26/01 Plainview NY (516) 694-6700
BIT TIMES
COMMAND WORD
DATA WORD
BIT WORD
STATUS WORD 1
Aeroflex Circuit Technology
1 2
SYNC
SYNC
SYNC 15
SYNC
3 4
Transmitter Timeout on Bus 3
14
5
Note: T/R - Transmit/Receive P - Parity
Transmitter Timeout on Bus 2
13 5 12
6
5
Transmitter Timeout on Bus 1 Transmitter Timeout on Bus 0
11
7
REMOTE TERMINAL ADDRESS
T/R
10
Message Error
1 1
REMOTE TERMINAL ADDRESS
8
Bus 3 Shutdown Bus 2 Shutdown Bus 1 Shutdown Bus 0 Shutdown Broadcast Transmit Data Received
3
9
1
Figure 3 - Word Formats
9
18
10
Instrumentation
1
8
11
Service Request
16
DATA
5
12
7 6
13
SUBADDRESS/MODE
RESERVED 1 1
Word Count High Word Count Low Illegal Mode Command Mode T/R Bit Wrong Loop Test Failure Subsystem Handshake Failure Transmitter Timeout Flag
14
5 4
15
Broadcast Command Received Busy
1
16
3 2
5
17
Subsystem Flag
1
18
1
DATA WORD COUNT/MODE CODE
Dynamic Bus Control Acceptance
1
0
19
LSB
Terminal Flag Parity
20
P
P
P
1
1
1
20
SCD3492 REV B 6/26/01 Plainview NY (516) 694-6700
Transformer Coupled Stubs
STUB TX/RX 1 : 1.5 ISOLATION 1 : 1.41 55
70
C TX/RX Zoi
A
55
VCMT = 10 VPK DC to 2MHZ
Direct Coupled Stubs
STUB TX/RX 1 : 2.12 55
B TX/RX Zoi NOTES: 1. Point C, Vo = 18 Vpp Minimum 2. Transformer self Impedance 3K at 1MHz 3. VCMT for transformer coupled stubs VCMD for direct coupled stubs
A
55 35 35
+ VCMD -
Figure 4 - TRANCEIVER SIGNAL POINTS
Aeroflex Circuit Technology
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SCD3492 REV B 6/26/01 Plainview NY (516) 694-6700
TRESP 16 DATA BITS Mid-Sync Mid-Parity Mid-Sync P DATA 16 DATA BITS P STAT 16 DATA BITS P
POINT A Fig 4
CMD
Mid-Sync
CMSYNC
TD1 TD1
Aeroflex Circuit Technology (Request Bus 1) TD2 PW1 DTAK = 0
3-STATE WITH PULLUP H L H L H L
DWSYNC
EOT
RTO
REQBUS A
REQBUS B
NBGT
H/L
IUSTB
INCMD
20 COMMAND
PREVIOUS VALUE
STATEN
VALD
DTRQ
GBR
NDRQ
IH 08-715
DATA
STATUS
TX/RX
PREVIOUS VALUE VALID
SA 3-4
PREVIOUS VALUE
SA 0-2
PREVIOUS VALUE
VALID
WC 0-4
PREVIOUS VALUE
VALID
CWC 0-4
CWC = 00000
CWC = 00001
SCD3492 REV B 6/26/01 Plainview NY (516) 694-6700
Figure 5 - RT RECEIVE 1 WORD (NON MODE)
TRESP 16 DATA BITS Mid-Parity Mid-Parity Mid-Sync P STAT 16 DATA BITS P DATA 16 DATA BITS P
POINT A Fig 4
CMD
Aeroflex Circuit Technology PW1 PW1 TD1 TD1 TD2 PW2 DTAK = 0
3-STATE WITH PULLUP H L H L H L
Mid-Sync
CMSYNC
DWSYNC
EOT
RTO
REQBUS A
REQBUS B
NBGT
H/L
IUSTB
21 COMMAND STATUS
PREVIOUS VALUE
INCMD
STATEN
DTRQ
NDRQ
IH 08-715
DATA
TX/RX
PREVIOUS VALUE VALID
SA 3-4
PREVIOUS VALUE VALID
SA 0-2
PREVIOUS VALUE
WC 0-4
PREVIOUS VALUE
VALID
CWC 0-4
CWC = 00000
CWC = 00001
SCD3492 REV B 6/26/01 Plainview NY (516) 694-6700
Figure 6 - RT TRANSMIT 1 WORD (NON MODE)
TRESP 16 DATA BITS Mid-Parity Mid-Sync Mid-Parity P STAT 16 DATA BITS P
POINT A Fig 4
CMD
Aeroflex Circuit Technology TD1 IF DBCACC = 0 PW1 (Request Bus 1) PW1 DURING "RESET REMOTE TERMINAL" TD2 DURING "SYNC NO DATA"
3-STATE WITH PULLUP H COMMAND PREVIOUS VALUE STATUS L H L PREVIOUS VALUE VALID PREVIOUS VALUE VALID PREVIOUS VALUE VALID PREVIOUS VALUE CWC = 00000
CMSYNC
DBCREQ
EOT
RTO
REQBUS A
REQBUS B
NBGT
H/L
IUSTB
RESET
22
INCMD
SYNC
STATEN
NDRQ
IH 08-715
TX/RX
SA 3-4
SA 0-2
WC 0-4
CWC 0-4
SCD3492 REV B 6/26/01 Plainview NY (516) 694-6700
Figure 7 - RT TRANSMIT MODE (NO DATA)
TRESP 16 DATA BITS Mid-Parity Mid-Sync P STAT 16 DATA BITS P DATA 16 DATA BITS P
POINT A Fig 4
CMD
Aeroflex Circuit Technology (Request Bus 0)
ACTIVE DURING "TRANSMIT BIT WORD' ACTIVE DURING "TRANSMIT LAST COMMAND" 3-STATE WITH PULLUP H L H L H L
CMSYNC
DWSYNC
EOT
RTO
REQBUS A
REQBUS B
NBGT
H/L
IUSTB
INCMD
23 COMMAND STATUS
PREVIOUS VALUE
STATEN
VECTEN
BITEN
LSTCMD
NDRQ
IH 08-715
DATA
INPUT DURING `TRANSMIT VECTOR` ONLY
TX/RX
PREVIOUS VALUE VALID
SA 3-4
PREVIOUS VALUE
SA 0-2
PREVIOUS VALUE
VALID
WC 0-4
PREVIOUS VALUE
VALID
CWC 0-4
CWC = 00000
SCD3492 REV B 6/26/01 Plainview NY (516) 694-6700
Figure 8 - RT TRANSMIT MODE (WITH DATA)
TRESP 16 DATA BITS 16 DATA BITS Mid-Parity Mid-Sync P STAT 16 DATA BITS P P DATA
POINT A Fig 4
CMD
Aeroflex Circuit Technology (Request Bus 0) TD1
PW1 3-STATE WITH PULLUP H L H L H L
CMSYNC
DWSYNC
EOT
RTO
REQBUS A
REQBUS B
NBGT
H/L
IUSTB
INCMD
24 COMMAND
PREVIOUS VALUE
STATEN
VALD
SYNC
NDRQ
IH 08-715
DATA
STATUS
TX/RX
PREVIOUS VALUE VALID
SA 3-4
PREVIOUS VALUE VALID
SA 0-2
PREVIOUS VALUE
WC 0-4
PREVIOUS VALUE
VALID
CWC 0-4
CWC = 00000
SCD3492 REV B 6/26/01 Plainview NY (516) 694-6700
Figure 9 - RT RECEIVE MODE (WITH DATA )
4 to 12 s TRESP STAT2 16 DATA BITS P DATA 16 DATA BITS P STAT1 16 DATA BITS P P CMD2 16 DATA BITS P
POINT A Fig 4
CMD1
16 DATA BITS
Aeroflex Circuit Technology
HL 3 STATE WITH PULLUP HL HL VALID VALID VALID
CMSYNC
DWSYNC
EOT
RTO
REQBUSA
REQBUSB
NBGT
TX/RX
INCMD
NDRQ
25
DTRQ
DTAK
H/L
IUSTB
IH(7:0)
STATEN
GBR
SA(4:0)
PREVIOUS VALUE
WC(4:0)
PREVIOUS VALUE
CWC(4:0)
PREVIOUS VALUE
SCD3492 REV B 6/26/01 Plainview NY (516) 694-6700
Figure 10 - RT RT to RT TRANSFER
1553 BUS
DATA BITS
P
DATA WORD WHEN REQUIRED
MID PARITY - COMMAND WORD TD1
REQBUS A
REQBUS B
TD2
NBGT
PW1
INCMD
H/L
TD3 TD4
IUSTB
PW2 PW2 TDSULOW TDHLDHI TDSUHI TDHLDLO
IH08-715
3 STATE WITH PULLUP
HI LO COMMAND
PREVIOUS STATE TD5 VALID
TX/RX
SA3-SA4
PREVIOUS STATE
VALID
TD5
SA0-SA2
PREVIOUS STATE
VALID
WC0-WC4
PREVIOUS STATE
VALID
TD6
CWC0-CWC4
PREVIOUS STATE
CWC = 00000
Figure 11 - COMMAND WORD TRANSFER (ALL)
Aeroflex Circuit Technology 26 SCD3492 REV B 6/26/01 Plainview NY (516) 694-6700
INCMD
TD1 TD2 TIED TO DTAK TD3
DTRQ
PW1 TD4
Aeroflex Circuit Technology TD5 TDSULO TDSUHI TDHLDLO
HI LOW HI LOW 3 STATE WITH PULLUP HI LOW
NDRQ
STATEN
H/L
IUSTB
IH08-715
COMMAND
PREVIOUS STATE PREVIOUS STATE CWC = 00000
STATUS
TX DATA
TX/RX
CWC0-CWC4
CWC = 00001
Figure 12 - RT TRANSMIT COMMAND SERVICE (NON-MODE)
27 TIED TO DTAK
INCMD
VALD
DTRQ
NDRQ
TD1 PW1
STATEN
GBR
H/L
IUSTB
3 STATE WITH PULLUP HI LOW HI LOW
IH08-715
RX DATA
CWC CWC = CWC + 1
STATUS
CWC0-CWC4
SCD3492 REV B 6/26/01 Plainview NY (516) 694-6700
Figure 13 - RT RECEIVE COMMAND SERVICE (NON-MODE)
NBGT
1.5s Minimum
TX/RX
Previous command value
Valid
SA4-SA0
Previous command value
Valid
WC4-WC0
Previous command value
Valid
CWC4-CWC0
INCMD
INCLK
BUSY Latched here
Figure 14 - NEW COMMAND INITIALIZATION
Aeroflex Circuit Technology
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SCD3492 REV B 6/26/01 Plainview NY (516) 694-6700
DTRQ
TDHS
DTAK
TDHSHLD
H/L
TD1
IUSTB
TDSUHI TDHLDHI TDHLDLO TDSULO
IH08-IH715
H
L
TD2
RX DATA
CWC3-CWC4
TRANSMIT RECEIVE
CWC
CWC=CWC+1
H/L
TD1
IUSTB
TDSUHI TDHLDHI TDSULO TDHLDLO
IH08-IH715
H
L
TD2
RX DATA
CWC3-CWC4
CWC
CWC=CWC+1
Figure 15 - DATA HANDSHAKE TRANSMIT / RECEIVE
Aeroflex Circuit Technology 29 SCD3492 REV B 6/26/01 Plainview NY (516) 694-6700
Aeroflex Circuit Technology
INCMD
TD1
SYNC
PW1
NDRQ
PW2
STATEN
TD2
H/L
30 HI LOW HI LOW
IUSTB
IH08-715
COMMAND STATUS
3 STATE WITH PULLUP
TX/RX
PREVIOUS STATE
CWC0-CWC4
PREVIOUS STATE CWC = 00000
SCD3492 REV B 6/26/01 Plainview NY (516) 694-6700
Figure 16 - RT TRANSMIT MODE SERVICE (NO DATA)
INCMD
TD1
VECTEN
PW1
BITEN LSTCMD
TD2 TD3
NDRQ
PW2
STATEN
TD4
H/L
TDSULO
IUSTB
TDSUHI
TDHLDLO TDHLDHI
HI LOW
IH08-715
3 STATE WITH PULLUP
HI
LOW
HI
LOW
COMMAND
STATUS
MODE DATA
TX/RX CWC0-CWC4
PREVIOUS STATE
PREVIOUS STATE
CWC = 00000
Figure 17 - RT TRANSMIT MODE SERVICE (WITH DATA)
INCMD VALD NDRQ STATEN
TD1 TD2
SYNC H/L
TD3
IUSTB
TDSUHI TDHLDHI TDSULO TDHLDLO
IH08-715
3 STATE WITH PULLUP
HI
LOW
HI
LOW
MODE DATA
STATUS
Figure 18 - RT RECEIVE MODE SERVICE (WITH DATA)
Aeroflex Circuit Technology 31 SCD3492 REV B 6/26/01 Plainview NY (516) 694-6700
PARAMETRICS
Test Conditions: Vcc = +5V 10%, Vss = 0, RL(PULL-UP) = 1.6K, RL(PULL-DOWN) = 5K, CL = 20 pf (Including Test Jig)}
TRANSMIT (NON MODE)
(See Figure 6)
LIMITS
RECEIVE (NON MODE)
(See Figure 5)
LIMITS
SYMBOL
MIN TRESP PW1 PW2 TD1 TD2 10.5 275 475 6.5 18.5 MAX 11.75 550 525 7.0 19 UNITS s ns ns s s
SYMBOL
MIN TRESP PW1 TD1 TD2 9.0 875 3.65 2.8 MAX 10 1325 3.95 3.5 UNITS s ns s s
TRANSMIT COMMAND SERVICE (NON MODE) (See Figure 12)
LIMITS
RECEIVE COMMAND (NON MODE) SERVICE (See Figure 13)
LIMITS
SYMBOL
MIN PW1 TD1 TD2 TD3 TD4 TD5 1.4 6.7 10 225 1.7 700 MAX 1.6 6.9 75 275 1.8 800 UNITS s s ns ns s ns
SYMBOL
MIN PW1 TD1 400 700 MAX 600 800 UNITS ns ns
Aeroflex Circuit Technology
32
SCD3492 REV B 6/26/01 Plainview NY (516) 694-6700
COMMAND WORD TRANSFER (ALL)
(See Figure 11)
DATA HANDSHAKE (See Figure 15)
LIMITS
LIMITS
SYMBOL
MIN MAX UNITS UNITS TRANSMIT ns ns s ns ns ns ns ns ns ns ns ns TDHS (TX) TDHSHLD TDSUHI TDHLDHI TDSULO TDHLDLO TD1 TD2 RECEIVE TDHS (RX) TDHSHLD TDSUHI TDHLDHI TDSULO TDHLDLO TD1 TD2 0 750 400 150 400 150 675 50 1.5 800 s ns ns ns ns ns ns ns 0 750 25 25 25 25 675 50 13.5 800 s ns ns ns ns ns ns ns
SYMBOL
MIN PW1 PW2 TD1 TD2 TD3 TD4 TD5 TD6 TDSUHI TDHLDHI TDSULO TDHLDLO 475 225 3.0 275 50 450 50 400 150 400 150 MAX 525 275 3.4 350 500 550 75 -
TRANSMIT MODE (WITH DATA)
(See Figure 8)
RECEIVE MODE (WITH DATA) (See Figure 9)
LIMITS
LIMITS
SYMBOL
MIN MAX 10 23.0 300 UNITS s s ns UNITS TRESP 9.0 21.75 200 s PW1 TD1
SYMBOL
MIN TRESP 9.5 MAX 10.5
Aeroflex Circuit Technology
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SCD3492 REV B 6/26/01 Plainview NY (516) 694-6700
TRANSMIT MODE SERVICE (WITH DATA) (See Figure 17)
LIMITS
RECEIVE MODE SERVICE (WITH DATA) (See Figure 18)
LIMITS
SYMBOL
MIN PW1 PW2 TD1 TD2 TD3 TD4 TDSUHI TDHLDHI TDSULO TDHLDLO 1.4 1.4 6.2 400 10 700 0 0 MAX 1.6 1.6 6.3 600 800 100 100 UNITS s s s ns s ns ns ns ns ns
SYMBOL
MIN TD1 TD2 TD3 TDSUHI TDHLDHI TDSULO TDHLDLO 725 680 375 400 150 400 150 MAX 825 760 825 UNITS ns ns ns ns ns ns ns
TRANSMIT MODE SERVICE (NO DATA) (See Figure 16)
LIMITS
TRANSMIT MODE (NO DATA)
(See Figure 7)
SYMBOL
MIN PW1 2.45 1.4 450 700 MAX 2.55 1.6 550 800 UNITS s s ns ns
LIMITS
SYMBOL
MIN TRESP PW1 TD1 TD2 9.5 400 600 150 MAX 11 600 1000 275 UNITS s ns ns ns
PW2 TD1 TD2
Aeroflex Circuit Technology
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SCD3492 REV B 6/26/01 Plainview NY (516) 694-6700
CLOCK
INCLK
INCMD
Aeroflex Circuit Technology DATA HI DATA LO STAT HI STAT LO BUSY sampled here (Both Transmit and Receive) CMD LO STAT HI STAT LO DATA HI DATA LO ALL VALID VALID
NDRQ
DTRQ
DTAK
H/L
IUSTB
IH(7:0)
STATEN
GBR
CWC(4:0)
Figure 19 INCLK TIMING - RECEIVE (DTAK DELAYED)
CLOCK
35
NBGT
TX/RX
INCLK
INCMD
NDRQ
DTRQ
DTAK
H/L
IUSTB
IH(7:0)
CMD HI
STATEN
GBR
SA(4:0)
PREVIOUS
SA3,4 VALID
WC(4:0)
PREVIOUS
CWC(4:0)
SCD3492 REV B 6/26/01 Plainview NY (516) 694-6700
Figure 20 INCLK TIMING - TRANSMIT (DTAK DELAYED)
4 TO 12 s 16 DATA BITS P STAT 16 DATA BITS P DATA 16 DATA BITS P
POINT A Fig 4 RT/BC
CMD
BCOPA
Aeroflex Circuit Technology
3 STATE WITH PULLUP HL HL
BCOPB
BCOPSTB
REQBUSA
REQBUSB
VALD
TX/RX
DWSYNC
CMSYNC
EOT
RTO
NBGT
36
NDRQ
DTRQ
DTAK
H/L
IUSTB
STATSTB
RMDSTB
CWEN
DWEN
INCMD
STATUS DATA
IH(7:0)
HL
COMMAND
GBR
SA(4:0)
PREVIOUS VALUE
SA
WC(4:0)
PREVIOUS VALUE
WC = 00001
SCD3492 REV B 6/26/01 Plainview NY (516) 694-6700
CWC(4:0)
CWC = 00000
CWC = CWC + 1
Figure 21 - BC TRANSMIT 1 WORD (NON MODE)
4 TO 12 s 16 DATA BITS P STAT 16 DATA BITS P DATA 16 DATA BITS P
POINT A Fig 4
CMD
RT/BC
BCOPA
Aeroflex Circuit Technology
HL 3 STATE WITH PULLUP HL
BCOPB
BCOPSTB
REQBUSA
REQBUSB
VALD
TX/RX
DWSYNC
CMSYNC
EOT
RTO
NBGT
NDRQ
37
CWC = CWC + 1
DTRQ
DTAK
H/L
IUSTB
STATSTB
RMDSTB
CWEN
DWEN
INCMD
STATUS
IH(7:0)
HL
COMMAND
DATA
SA(4:0)
PREVIOUS VALUE
SA
WC(4:0)
PREVIOUS VALUE
WC = 00001
CWC(4:0)
CWC = 00000
SCD3492 REV B 6/26/01 Plainview NY (516) 694-6700
Figure 22 - BC RECEIVE 1 WORD (NON MODE)
4 TO 12 s 16 DATA BITS STAT 16 DATA BITS P P
POINT A Fig 4
CMD
BCOPA
Aeroflex Circuit Technology
3 STATE WITH PULLUP HL
BCOPB
BCOPSTB
REQBUSA
REQBUSB
VALD
TX/RX
DWSYNC
CMSYNC
EOT
RTO
NBGT
38
NDRQ
DTRQ DTAK
H/L IUSTB
STATSTB
RMDSTB
CWEN
DWEN
INCMD
STATUS
IH(7:0)
HL
GBR
COMMAND
SA(4:0)
PREVIOUS VALUE
WC(4:0)
PREVIOUS VALUE
CWC(4:0)
PREVIOUS VALUE
SCD3492 REV B 6/26/01 Plainview NY (516) 694-6700
RT/BC = 0
Figure 23 - BC TRANSMIT MODE (NO DATA)
4 TO 12 s P STAT 16 DATA BITS P DATA 16 DATA BITS P
POINT A Fig 4
CMD
16 DATA BITS
BCOPA
Aeroflex Circuit Technology
3 STATE WITH PULLUP HL HL
BCOPB
BCOPSTB
REQBUSA
REQBUSB
VALD
TX/RX
DWSYNC
CMSYNC
EOT
RTO
NBGT
39
NDRQ
DTRQ DTAK
H/L
IUSTB
STATSTB
RMDSTB
CWEN DWEN INCMD IH(7:0)
HL
GBR
COMMAND
STATUS
DATA
SA(4:0)
PREVIOUS VALUE
WC(4:0)
PREVIOUS VALUE
CWC(4:0)
PREVIOUS VALUE
SCD3492 REV B 6/26/01 Plainview NY (516) 694-6700
RT/BC = 0
Figure 24 - BC TRANSMIT MODE (WITH DATA)
4 to 12 s 16 DATA BITS P DATA 16 DATA BITS P STAT 16 DATA BITS P
POINT A Fig 4
CMD
BCOPA
Aeroflex Circuit Technology
3 STATE WITH PULLUP HL
BCOPB
BCOPSTB
REQBUSA
REQBUSB
VALD
TX/RX
DWSYNC
CMSYNC
EOT
RTO
NBGT
40
NDRQ
DTRQ DTAK
H/L IUSTB
STATSTB
RMDSTB
CWEN
DWEN
INCMD
STATUS
IH(7:0)
HL
HL
COMMAND
DATA
GBR
SA(4:0)
PREVIOUS VALUE
WC(4:0)
PREVIOUS VALUE
CWC(4:0)
PREVIOUS VALUE
SCD3492 REV B 6/26/01 Plainview NY (516) 694-6700
RT/BC = 0
Figure 25 - BC RECEIVE MODE (WITH DATA)
4 to 12 s P CMD2 16 DATA BITS P STAT2 16 DATA BITS P DATA 16 DATA BITS P STAT1 16 DATA BITS P
4 to 12 s
POINT A Fig 4
CMD1
16 DATA BITS
BCOPA
Aeroflex Circuit Technology
3 STATE WITH PULLUP HL HL HL
BCOPB
BCOPSTB
REQBUSA
REQBUSB
VALD
TX/RX
CMSYNC
DWSYNC
EOT
RTO
NBGT
NDRQ
41 STATUS
DTRQ
DTAK H/L
IUSTB
STATSTB
RMDSTB
CWEN DWEN
INCMD
DATA STATUS
IH(7:0)
HL
HL
COMMAND COMMAND
GBR SA(4:0)
PREVIOUS VALUE
SA = ?
WC(4:0)
PREVIOUS VALUE
WC = ?
CWC(4:0)
PREVIOUS VALUE
CWC = CWC + 1
SCD3492 REV B 6/26/01 Plainview NY (516) 694-6700
RT/BC = 0
Figure 26 - BC RT TO RT TRANSFER
Aeroflex Circuit Technology DATA P DSYNC DATA P
3 STATE WITH PULLUP H L H L
POINT A Fig 4
CSYNC
RT/BC
PASMON
BCOPA
BCOPB
REQBUSA
REQBUSB
VALD
TX/RX
CMSYNC
42 COMMAND or STATUS WORD
DMSYNC
EOT
RTO
NBGT
H/L
STATSTB
RMDSTB
DATA WORD
IH(7:0)
SCD3492 REV B 6/26/01 Plainview NY (516) 694-6700
Figure 27 MONITOR MODE
t3
BCOP-A,BCOP-B REQBUS-A,REQBUS-B VALID
t3
VALID
t4
t4
BCOPSTB First
t1
Limits: 250nS < 7S <
Second
t1
t2 t1 < 5S t2 < 17S t3 < 500nS
t4 > 1.5S
Figure 28 - BCOP Sequence Timing
FIRST OR ONLY BCOPSTB SECOND BCOPSTB BCOP-B N/A 0 N/A BCOP-A N/A 0 N/A
TRANSFER TYPE
Normal Data (BC to RT / RT to BC) RT to RT Mode Codes (No Data) [T/R = 0] 00h 01h 02h 03h 04h 05h 06h 07h 08h Dynamic Bus Control Synchronize (No DATA) Transmit Status Initiate Self Test Transmitter Shutdown Override TX Shutdown Inhibit TF Flag Override Inhibit TF Flag Reset Remote Terminal
BCOP-B 0 0 0
BCOP-A 0 1 1
Mode Codes (Data RT to BC) [T/R = 1] 10h Transmit Vector Word 12h Transmit Last Command 13h Transmit Bit Word Mode Codes (Data BC to RT) [T/R = 0] 11h Synchronize (With DATA) 14h Selected TX Shutdown 15h Override Selected TX Shutdown
0
1
1
1
0
1
1
0
Table 1 - BCOP Sequences
Aeroflex Circuit Technology 43 SCD3492 REV B 6/26/01 Plainview NY (516) 694-6700
7 D7 Q7 Q6 Q5 Q4 Q8 Q2 Q1 Q0 D6 D5 D4 D3 D2 D1 D0 7 7 6 5 4 3 2 1 0 6 5 4 3 2 1 0 6 5 4 3 2 1 0
18 17 14 13 8 7 4 3 11 1
OE GND VCC
19 16 15 12 9 6 5 2 +Vcc 20
Aeroflex Circuit Technology
HIGH BYTE DATA
IH715 (C9) IH614 (D9) IH513 (B9) IH412 (D8) IH311 (A9) IH210 (D7) IH19 (D6) IH08 (E9)
HIGH DATA CLOCK
7 D7 Q7 Q6 Q5 Q4 Q8 Q2 Q1 Q0 D6 D5 D4 D3 D2 D1 D0 7 6 5 4 3 2 1 0 6 5 4 3 2 1 0
10
LOW DATA CLOCK
18 19 16 15 12 9 6 5 2 +Vcc 20 17 14 13 8 7 4 3 11 1
OE GND VCC
ACT3492
44
LOW BYTE DATA
10
TX/RX (H10) DTRQ (K10) or VECTEN (G8) H/L (J9)
DTAK may be connected to DTRQ, Ground or controlled
SCD3492 REV B 6/26/01 Plainview NY (516) 694-6700
Figure 29 TYPICAL TRANSMIT DATA INTERFACE
7 Q7 Q6 Q5 Q4 Q8 Q2 Q1 Q0 D0 D1 D2 D3 D4 D5 D6 D7 7 7 6 5 4 3 2 1 0 6 5 4 3 2 1 0 6 5 4 3 2 1 0
19 18 17 14 13 8 7 4 3 11 1 10 16 15 12 9 6 5 2 +Vcc
OE GND VCC
Aeroflex Circuit Technology
HIGH BYTE DATA
IH715 (C9) IH614 (D9) IH513 (B9) IH412 (D8) IH311 (A9) IH210 (D7) IH19 (D6) IH08 (E9)
20
HIGH BYTE ENABLE
7 Q7 Q6 Q5 Q4 Q8 Q2 Q1 Q0 D0 D1 D2 D3 D4 D5 D6 D7 7 6 5 4 3 2 1 0 6 5 4 3 2 1 0
IUSTB (G6) H/L (J9)
18 17 14 13 8 7 4 3 11 1 10
19 16 15 12 9 6 5 2 +Vcc
OE GND VCC
45
SYNC (G7) or DTRQ (K10) TX/RX (H10)
LOW BYTE DATA
ACT3492
DTAK may be connected to DTRQ, Ground or controlled
20
LOW BYTE ENABLE
SCD3492 REV B 6/26/01 Plainview NY (516) 694-6700
Figure 30 TYPICAL RECEIVE DATA INTERFACE
Package Pin Out Description By Pin - ACT3492
Pin #
A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 C1 C2 C3 C4 C5 C6 C7 C8 C9 C10 D1 D2 D3 D4
Aeroflex Circuit Technology
Function
RTADER +5VAB SERVREQ WC4 SSERR WC2 LTEN LTTRIG IH311 NEXTSTAT TXRX A2 TXRX A1 DBCACC RT/BC HSFAIL WC3 WC0 MASTER RESET IH513 BCOPA GNDA VALD TXTO RESET DBCREQ BITEN/RMDSTB BUSY WC1 IH715 BCOPB TXRX A2 TXRX A1 PARER TEST
Pin #
D5 D6 D7 D8 D9 D10 E1 E2 E3 E4 E5 E6 E7 E8 E9 E10 F1 F2 F3 F4 F5 F6 F7 F8 F9 F10 G1 G2 G3 G4 G5 G6 G7 G8
Function
LSTCMD/CWEN IH19 IH210 IH412 IH614 NDRQ +5VAA LTFAIL MANER 6MCK REQBUSA STATUPDATE ENABLE MEREQ IH08 +5V LOGIC +5VBB ERROR RTO RTAD4 BCSTEN 1 DTAK BCOPSTB PASMON DIG GND 1 / CASE DIG GND 2 / CASE TXRX B1 TXRX B2 DWSYNC CMSYNC BCSTEN 0 IUSTB SYNC VECTEN/DWEN
46
Pin #
G9 G10 H1 H2 H3 H4 H5 H6 H7 H8 H9 H10 J1 J2 J3 J4 J5 J6 J7 J8 J9 J10 K1 K2 K3 K4 K5 K6 K7 K8 K9 K10
Function
NBGT INCLK GNDB SA4 DRVINH CWC0 RTAD3 REQBUSB SA2 CWC1 EOT TX/RX TXRX B1 TXRX B2 PASS BITDECODE RTAD2 RTADPAR GBR CWC3 H/L SA0 CWC4 +5VBA SA3 CWC2 RTAD1 RTAD0 STATEN/STATSTB SA1 INCMD DTRQ
SCD3492 REV B 6/26/01 Plainview NY (516) 694-6700
Package Pin Out Description By Function - ACT3492
Function
+5VAA +5VAB +5VBA +5VBB +5V LOGIC 6MCK BCOPA BCOPB BCOPSTB BCSTEN 0 BCSTEN 1 BITDECODE BITEN/RMDSTB BUSY CMSYNC CWC0 CWC1 CWC2 CWC3 CWC4 DBCACC DBCREQ DIG GND 1 / CASE DIG GND 2 / CASE DRVINH DTAK DTRQ DWSYNC ENABLE EOT ERROR GBR GNDA GNDB
Aeroflex Circuit Technology
Pin #
E1 A2 K2 F1 E10 E4 B10 C10 F7 G5 F5 J4 C6 C7 G4 H4 H8 K4 J8 K1 B3 C5 F9 F10 H3 F6 K10 G3 E7 H9 F2 J7 C1 H1
Function
H/L HSFAIL IH08 IH19 IH210 IH311 IH412 IH513 IH614 IH715 INCLK INCMD IUSTB LSTCMD/CWEN LTEN LTFAIL LTTRIG MANER MASTER RESET MEREQ NBGT NDRQ NEXTSTAT PARER PASMON PASS REQBUSA REQBUSB RESET RT/BC RTAD0 RTAD1 RTAD2 RTAD3
47
Pin #
J9 B5 E9 D6 D7 A9 D8 B9 D9 C9 G10 K9 G6 D5 A7 E2 A8 E3 B8 E8 G9 D10 A10 D3 F8 J3 E5 H6 C4 B4 K6 K5 J5 H5
Function
RTAD4 RTADER RTADPAR RTO SA0 SA1 SA2 SA3 SA4 SERVREQ SSERR STATEN/STATSTB STATUPDATE SYNC TEST TX/RX TXRX A1 TXRX A2 TXRX B1 TXRX B2 TXRX A1 TXRX A2 TXRX B1 TXRX B2 TXTO VALD VECTEN/DWEN WC0 WC1 WC2 WC3 WC4
Pin #
F4 A1 J6 F3 J10 K8 H7 K3 H2 A3 A5 K7 E6 G7 D4 H10 B2 B1 G1 G2 D2 D1 J1 J2 C3 C2 G8 B7 C8 A6 B6 A4
SCD3492 REV B 6/26/01 Plainview NY (516) 694-6700
Ceramic CoFired PGA Package Outline
Pin A1 & ESD Designator
.040 REF 45 CHAMFER BRAZE RING
.020 REF 45 CHAMFER 4X
.065 SQ
1 2 3 4 5 6 7 8 9 10
.065 DIA TYP
.100 TYP
.900 1.060 SQ .015
A
B
C
D
E
F
G
H
J
K
Standoffs Pins B2, J2, B9 & J9
.050 .005 .050 4X .018 .002
.160 MAX .180 .010
Aeroflex Circuit Technology
48
SCD3492 REV B 6/26/01 Plainview NY (516) 694-6700
CIRCUIT TECHNOLOGY
Ordering Information
Model Number
ACT3492
DESC Part Number
Pending
Package
1.06" x 1.06" Ceramic Plug In
Aeroflex Circuit Technology 35 South Service Road Plainview New York 11803
Specifications subject to change without notice.
Aeroflex Circuit Technology 49
Telephone: (516) 694-6700 FAX: (516) 694-6715 Toll Free Inquiries: 1-(800)THE-1553
SCD3492 REV B 6/26/01 Plainview NY (516) 694-6700

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